More fast I/O problems
Hello Rolf,
I work with IAR 5.10 EWARM and JLINK on an LPC2148 chip. Faessle says that his fast I/O problem is lack of sync between the chip and the debugger, though the hardware works fine. According to my experience, this is not merely a reporting problem, but rather an actual corruption of the fast I/O port.
I have been using the workaround suggested in the JLINK manual, and this certainly solved the problem, but still, from time to time, the fast I/O registers become corrupted, under the following conditions: 1. Running the code from RAM, and 2. Stopping at a breakpoint.
Using a scope, I noticed that the IO register changes state AFTER the breakpoint has been reached, and while the debugger collected information from the target. Some further testing led me to the following assumptions/conclusions:
a) The ARM bug workaround is implemented for GPIO watch window display.
b) When breaking at some point in the code, the disassembler window collects target code bytes from an area located before and after the breakpoint address.
c) When running from RAM, the code starting area (~0x40000000) comes in close proximity with the fast IO SFRs.
d) If breaking at around 0x40000000+, the disassembler collects target data from below 0x40000000 without applying the workaround, corrupting the fast IO registers.
e) If the disassembler window is closed - the problem disappears.
Thanks
Gaby
This post has been edited 1 times, last edit by "Gaby" (Dec 24th 2007, 4:05pm)